mDAC2018 - Workshop scope


The memristor is an emerging technology which is triggering intense interdisciplinary activity.  It has the potential of providing many benefits, such as energy efficiency, density, reconfigurability, non-volatile memory, novel computational structures and approaches, massive parallelism, etc. These characteristics may force to deeply revisit existing computing and storage paradigms.

This workshop (fifth edition after four successful ones at HiPEAC 2014, HiPEAC 2015, HiPEAC 2016 and HiPEAC 2017) aims at providing a European forum to discuss memristor technology and its potential applications. It also aims at creating an European network of competence and experts in all aspects of memristor technology including (but not limited to): 

  • Technology, physics and modeling: new memristive device technologies, Device modeling and characterization, etc.
  • Novel logic and circuit design concepts using resistive devices: memristive-based logic, memristive-based circuits, multi-level based logics, material implication logic, Boolean logic, threshold logic, memories/storage, analog circuits, PUF technology, resistive memories, etc.
  • System architectures and new computing paradigms: resistive computing, in-memory-computing, neuro-inspired computing, novel architectures and CMOS integration, cellular automata and array computing, reconfigurable architectures, new communication concepts for memristor based architectures, etc. 
  •  Applications exploiting memristive devices: signal processing, chaos and complex networks, sensory applications.
  • Automation and CAD tools for memristive circuits: mapping tools, compilers, logic synthesis tools, design space exploration tools,  programming models and compilers for memristor based architectures etc. 

Founders and Organizers

Said Hamdioui and Koen Bertels, Delft University of Technology, the Netherlands

Steering committee

  • Said Hamdioui, TUdelft, NL
  • Henk Corporaal TU/e, NL
  • Dietmar Fey, FAU, DE
  • Christian Weis, University of Kaiserslautern, DE
  • Bastien Giraud, CEA-LETI, FR

Program committee

Dalibor Biolek, UNOB, CZ

Eero Lehtonen, UTU, FI

Albert Cohen, INRIA, FR

Shahar kvatinsky, Technion, IS

Khaled Nabil Salama, KAUST, SA

Fernando Cortinto, Polito, IT

Danilo Demarchi, Polito, IT

Georgios Sirakoulis, DUTH. GR

Ronald Tetzlaff, U of Dresden, DE

Dirk Wouters, RWTH, DE

Preliminary deadlines

  • Abstract submission: November 15, 2017
  • Notification of acceptance: November 30, 2017


  • Duration: 1 day
  • The workshop will consist of invited talks and technical presentations. The latter will be selected based on submitted abstracts. The invited talks and the technical  presentations will cover different aspects of memristor technology, circuits, architecture, etc. 

Expected number of attendees

  • It is expected to have 30 to 50 attendees



Preliminary deadlines

  • Abstract submission: November 15, 2017
  • Notification of acceptance: November 30, 2017


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